Simulation of direct tunneling through stacked gate dielectrics by a fully integrated 1D-Schrodinger-Poisson solver

Author

Wettstein, A. ; Schenk, A. ; Fichtner, W.

Author_Institution

Integrated Syst. Lab., Eidgenossische Tech. Hochschule, Zurich, Switzerland

fYear

1999

fDate

1999

Firstpage

243

Lastpage

246

Abstract

We compare the numerical results for electron tunneling currents for single gate oxides, ON- and ONO-structures. We demonstrate that stacked dielectrics can keep the tunneling currents a few orders of magnitude lower than electrostatically equivalent single oxides. We also discuss the impact of gate material and the modeling of electron transport in silicon

Keywords

MIS capacitors; MOSFET; Poisson equation; Schrodinger equation; dielectric thin films; leakage currents; semiconductor device models; tunnelling; MIS capacitors; ON structures; ONO structures; Si-SiO₂; SiO₂-Si₃N₄-SiO₂; direct tunneling simulation; electron transport modeling; electron tunneling currents; fully integrated 1D-Schrodinger-Poisson solver; gate material; n-channel MOSFET; numerical results; single gate oxides; stacked gate dielectrics; Boundary conditions; Dielectric materials; Dielectric substrates; Effective mass; Electrons; Laboratories; Schrodinger equation; Silicon; Tunneling; Turning;

fLanguage

English

Publisher

ieee

Conference_Titel

Simulation of Semiconductor Processes and Devices, 1999. SISPAD '99. 1999 International Conference on

Conference_Location

Kyoto

Print_ISBN

4-930813-98-0

Type

conf

DOI

10.1109/SISPAD.1999.799306

Filename

799306