Stability analysis of a voltage-temperature (V/T) limit circuit for satellite power system

A voltage-temperature (V/T) limit circuit for a satellite power system is designed and analyzed for the maximum and the minimum voltage deviations in the normal and the worst case of the EOL (end of life). The normal case is that the normal values of the V/T limit circuit devices are used, and the worst case is that BOL (beginning of life) error, EOL error and temperature coefficient error of the circuit devices are used. It is demonstrated that the magnitude of voltage deviations due to circuit device tolerances are kept less than 0.3 V in the worst case. The maximum battery voltages are simulated for the environmental temperature range of 0°C ~30°C by using MATHCAD. They are 34.67 V~29.851 V. The stability analysis of the V/T loop is performed in the worst case. In the normal and the worst case, the minimum phase margin of the V/T loop are calculated by using maximum and minimum parameter values of the open loop transfer function