Comparative thermal noise analysis of DG MOSFET using SiO2, SiC-SiO2, Si3N4-SiO2, SiO2-Al2O3 as dielectric layer

The most promising device in the Nano scale range are based on multiple gate structures such as double-gate (DG) MOSFETs. These devices could be used for high frequency applications due to the significant increase of the transition frequency fT for these devices. For low noise radiofrequency applications, high frequency noise models are required. In this paper, compact channel noise models valid in all regions of operation for Double Gate (DG) MOSFETs have been developed and experimentally verified. Our compact channel noise model of a DG MOSFET includes the physics based expressions for thermal noise. Using this model the DG MOSFET noise performances are studied.