Design of a 0.9-V 5-MHz sampling frequency 120-µW 1-bit fourth-order feedforward Sigma-Delta modulator

Design of a 0.9-V 5-MHz sampling frequency 120-μW 1-bit fourth-order feedforward sigma-delta modulator using a standard CMOS 130-nm technology is presented. Modifications to an OTA design to improve its GBW and slew rate are presented. The simulated GBW and slew rate of the modified OTA have increased to 200 MHz and 15 V/μs, respectively. Consequently, the modulator sampling frequency has increased to 5 MHz without significant increase of the average total power consumption, which is projected to be less than 120 μW.