Implementation of a digital receiver for DS-CDMA communication systems using HW/SW codesign

Author

de Souza, D.C. ; Krikidis, I. ; Naviner, L. ; Danger, J.-L. ; de Barros, M.A. ; Neto, B.G.A.

Author_Institution

Dept. COMELEC, Telecom Paris

fYear

2005

fDate

7-10 Aug. 2005

Firstpage

587

Abstract

An optimized partitioning algorithm for HW/SW codesign is described and applied to the implementation of a digital RAKE receiver for DS-CDMA on an heterogeneous (hardware/software) platform. The development of this partitioning algorithm aims to gather quality features that have already proved effective when applied separately, but had not been used together yet. The partitioning algorithm is applied to a flexible RAKE architecture able to adapt its number of demodulation fingers to each propagation environment. This RAKE detector uses a serial and iterative computation of the required processing in order to jointly optimize performance and computational power

Keywords

code division multiple access; demodulation; digital radio; hardware-software codesign; logic partitioning; radio receivers; spread spectrum communication; DS-CDMA communication systems; RAKE receiver; demodulation; digital receiver; hardware-software codesign; iterative computation; optimized partitioning algorithm; serial computation; Computer architecture; Demodulation; Fading; Hardware; Iterative algorithms; Multiaccess communication; Multipath channels; Partitioning algorithms; RAKE receivers; Software algorithms;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2005. 48th Midwest Symposium on

Conference_Location

Covington, KY

Print_ISBN

0-7803-9197-7

Type

conf

DOI

10.1109/MWSCAS.2005.1594169

Filename

1594169