Sub-quarter micron CMOS process for TiN-gate MOSFETs with TiO/sub 2/ gate dielectric formed by titanium oxidation

Author

Hobbs, C. ; Hegde, R. ; Maiti, B. ; Tseng, H. ; Gilmer, D. ; Tobin, P. ; Adetutu, O. ; Huang, F. ; Weddington, D. ; Nagabushnam, R. ; O´Meara, D. ; Reid, K. ; La, L. ; Grove, L. ; Rossow, M.

Author_Institution

Adv. Products Res. & Dev. Lab., Motorola Inc., Austin, TX, USA

fYear

1999

fDate

14-16 June 1999

Firstpage

133

Lastpage

134

Abstract

We report here for the first time the integration of sub-quarter micron CMOSFETs on bulk silicon using an oxidized metal gate dielectric. A polysilicon capped physical vapor deposited (PVD) titanium nitride (TiN) was used as the gate electrode. Well behaved MOSFET characteristics were obtained. In this paper, we present results on the physical and electrical characterization of titanium dioxide (TiO/sub 2/) produced by oxidizing a thin PVD Ti film.

Keywords

CMOS integrated circuits; MOSFET; dielectric thin films; electrodes; integrated circuit interconnections; integrated circuit measurement; integrated circuit metallisation; oxidation; sputter deposition; titanium compounds; CMOS process; CMOSFET integration; MOSFET characteristics; TiN-TiO/sub 2/-Si; TiN-gate MOSFETs; TiO/sub 2/ gate dielectric; bulk silicon; electrical characterization; gate electrode; oxidized metal gate dielectric; physical characterization; polysilicon capped PVD TiN gate electrode; thin PVD Ti film; titanium dioxide; titanium oxidation; Annealing; Atherosclerosis; CMOS process; Dielectrics; MOSFETs; Oxidation; Silicon; Temperature; Tin; Titanium;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, 1999. Digest of Technical Papers. 1999 Symposium on

Conference_Location

Kyoto, Japan

Print_ISBN

4-930813-93-X

Type

conf

DOI

10.1109/VLSIT.1999.799379

Filename

799379