• DocumentCode
    3253534
  • Title

    Joint activity for semiconductor R&D and role of Semiconductor Technology Academic Research Center (STARC)

  • Author

    Takemoto, Toyoki

  • Author_Institution
    STARC, Kanagawa, Japan
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    7
  • Lastpage
    10
  • Abstract
    Manufacturers are facing new issues in that circuit designs incorporating tens of millions of transistors must be completed in a short period of time. It will be difficult to overcome this issue using extensions of existing design technologies. STARC is thus promoting technological developments aimed at the resolution of this problem through a new approach, namely, the introduction of automation in the high-level design stages of system development, and reuse of design assets. STARC develops strategic IP design technologies, including technologies for reducing power consumption. STARC is also training LSI design engineers in companies, and providing educational support for semiconductor research at universities
  • Keywords
    circuit CAD; high level synthesis; industrial property; integrated circuit design; large scale integration; low-power electronics; research and development management; LSI design; STARC; Semiconductor Technology Academic Research Center; circuit designs; design asset reuse; educational support; high-level design stages; power consumption; semiconductor R&D; strategic IP design technologies; Circuits; Large scale integration; Lead compounds; Materials requirements planning; National electric code; Process planning; Recruitment; Research and development; Standards development; Technology planning;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, Systems, and Applications, 2001. Proceedings of Technical Papers. 2001 International Symposium on
  • Conference_Location
    Hsinchu
  • ISSN
    1524-766X
  • Print_ISBN
    0-7803-6412-0
  • Type

    conf

  • DOI
    10.1109/VTSA.2001.934468
  • Filename
    934468