VLSI based tools for monitoring bus communication channels

Author

Gregoretti, Francesco ; Maddaleno, F.

Author_Institution

Dept. of Electron., Politecnico di Torino, Italy

fYear

1989

fDate

8-12 May 1989

Firstpage

29677

Lastpage

30773

Abstract

An architecture for the run-time monitoring of the performance of a computer system is presented. In order to reduce the complexity of the system, a special integrated circuit has been designed, and the prototype integrated circuits are to be used in a first experimental realization of the system. The first prototype has been implemented in 3-μm CMOS technology, contains 16 associative words, has a complexity of 11000 transistors, and has read/write and match times of 110 ns and 90 ns, respectively, due to a rather poor design of I/O pads. A second version in a 2-μm technology is currently under fabrication and is expected to reduce these times by one half

Keywords

CMOS integrated circuits; VLSI; computer interfaces; performance evaluation; 3 micron; CMOS technology; VLSI based tools; bus communication channels; computer system; performance; run-time monitoring; Application software; Communication channels; Computer architecture; Computerized monitoring; Debugging; Hardware; Operating systems; Sensor systems; System buses; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

CompEuro '89., 'VLSI and Computer Peripherals. VLSI and Microelectronic Applications in Intelligent Peripherals and their Interconnection Networks', Proceedings.

Conference_Location

Hamburg

Print_ISBN

0-8186-1940-6

Type

conf

DOI

10.1109/CMPEUR.1989.93448

Filename

93448