An efficient implementation of lazy reevaluation

Advances in distributed computing have resulted in the design of fast simulators for digital systems. A parallel, optimistically synchronized (time warp) digital systems simulator using VHDL as the hardware description language has been developed. The simulator incorporates several optimizations to the time warp mechanism, including lazy cancellation, flow control, lazy rollback, lazy reevaluation, and rollback relaxation. This paper presents an efficient implementation of lazy reevaluation which has historically been too computationally expensive for effective utilization. The realization of this optimization is proposed in this paper results in an identification of only a subset of the total forward jumps that are possible in lazy reevaluation