Low-Power Priority Encoder and Multiple Match Detection Circuit for Ternary Content Addressable Memory

Author

Mohan, Nitin ; Fung, Wilson ; Sachdev, Manoj

Author_Institution

Dept. of Electr. & Comput. Eng., Waterloo Univ., Waterloo, ON

fYear

2006

fDate

24-27 Sept. 2006

Firstpage

253

Lastpage

256

Abstract

Multiple match detection (MMD) circuits and priority encoders (PEs) are employed in ternary content addressable memory (TCAM) chips to detect multiple matches and to resolve the highest priority match. This paper presents novel PE and MMD circuits. Measurement results of the proposed circuits, fabricated in 0.18 mum CMOS technology, show significant (up to 70%) speed and energy improvements over the existing designs.

Keywords

CMOS integrated circuits; content-addressable storage; encoding; integrated circuit testing; low-power electronics; CMOS technology; multiple match detection circuits; priority encoder; size 0.18 mum; ternary content addressable memory; Associative memory; CMOS memory circuits; CMOS technology; Clocks; Delay; Energy measurement; Energy resolution; Impedance matching; Semiconductor device measurement; Velocity measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

SOC Conference, 2006 IEEE International

Conference_Location

Taipei

Print_ISBN

0-7803-9781-9

Electronic_ISBN

0-7803-9782-7

Type

conf

DOI

10.1109/SOCC.2006.283892

Filename

4063061

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3254994