Reconfigurable optically-interconnected parallel computer architecture

Reconfigurability is desirable in parallel computer architecture to enable efficient utilization of the inherent data communication patterns to various algorithms. Previous approaches to achieve reconfigurability have considered topology embedding, multistage permutation networks, and embedded switch arrays. This paper proposes a novel reconfigurable interconnection structure based on a multiple-domain multiple-wavelength channel passive optical network. The network acts as a host to a pre-selected library of guest topologies, whose embedding requirements are derived from their adjacency matrices. Reconfiguration takes place by re-labeling processor identifiers and re-tuning receivers according to a local table at each node