Analog/mixed signal synthesis for high-speed input/output channels

High-speed input/outputs (I/O) are in demand due to advances in integrated circuits (ICs), which made it possible to obtain multi gigahertz clock speeds. However, as very large scale integration (VLSI) technology scales down, the pin bandwidth does not scale accordingly. Some factors to consider in designing of high-speed I/Os are the integration of analog and digital circuitry, the interconnect performance, the precision required in processing of analog signals, and the sensitivity of analog circuit to noise, crosstalk and interference. Given that I/O design involves the emergence of both analog and digital circuitry, the design flow is comprised of a mixed-signal scheme. Less experienced designers usually use ad hoc methods to simulate the trade-offs between digital and analog modules, since there is a lack of standard simulation test-benches. Recent research in analog synthesis has demonstrated that goal oriented test-benches are the key enabler for analog re-use. This paper address a system methodology that can be used to set up a common simulation platform such that test-benches created for system model may be directly used for testing the Spice modules.