Design consideration for 2 kV SiC-SIT

Author

Onose, Hidekatsu ; Yatsuo, Tsutomu ; Watanabe, Atsuo ; Yokota, Takeshi ; Ishikawa, Toru ; Sanpei, Isamu ; Someya, Tomoyuki ; Kobayashi, Yutaka

Author_Institution

Hitachi Res. Lab., Hitachi Ltd., Japan

fYear

2001

fDate

2001

Firstpage

179

Lastpage

182

Abstract

Process technologies of the novel Static Induction transistor with source-gate self-aligned and overlapping (SAO) structures are considered in order to reduce the restrictions of alignment problems. A SiC-SIT with SAO structure is fabricated by using aluminum implantation for p gate on 4H n-type SiC. It is found that the SAO structure can be fabricated as expected by observing the cross sectional structure. Very low specific on-resistance of 39 mΩ cm² is successfully obtained. By reducing a unit cell, lower on-resistance can be expected as a half of this work

Keywords

aluminium; ion implantation; power field effect transistors; silicon compounds; static induction transistors; wide band gap semiconductors; 2 kV; SiC static induction transistor; SiC:Al; aluminum implantation; cross-sectional structure; power device; source-gate self-aligned and overlapping structure; specific on-resistance; unit cell; Aluminum; Electron devices; Epitaxial growth; FETs; Fabrication; Ion implantation; Low voltage; MOSFETs; Research and development; Silicon carbide;

fLanguage

English

Publisher

ieee

Conference_Titel

Power Semiconductor Devices and ICs, 2001. ISPSD '01. Proceedings of the 13th International Symposium on

Conference_Location

Osaka

ISSN

1063-6854

Print_ISBN

4-88686-056-7

Type

conf

DOI

10.1109/ISPSD.2001.934584

Filename

934584