Title :
Universal protocol subsystem architecture
Author_Institution :
Dept. of Electr. Eng., Eindhoven Univ. of Technol., Netherlands
Abstract :
The author describes a framework of a protocol subsystem architecture using a maximum of parallelism. As many protocols show similarities with regard to connection establishment, maintenance, and release, an attempt is made to model a universal protocol subsystem. Parallelism is used where applicable in order to obtain maximal data communication performance. In communications, multiple concurrent connections can be operated in parallel. Transmission and reception of data can also be performed in parallel. Also, processes can operate in parallel if protocol data units are pipelined through the subsystem in analog to pipelining within the communication system. The parallel process described can be implemented in software on a multiprocessor architecture (for example, on a network of transputers). Another possibility is the realization of the parallel communicating processes in a mix of VLSI implementation and software. The behavior of the various processes and the communication between these processes are discussed, along with additional requirements on management of the processes and on memory management
Keywords :
parallel architectures; protocols; VLSI implementation; maximal data communication performance; memory management; multiprocessor architecture; parallel communicating processes; parallelism; software; universal protocol subsystem architecture; Computer architecture; Data communication; Digital systems; Error correction; Memory management; Pipeline processing; Protocols; Routing; Uninterruptible power systems; Very large scale integration;
Conference_Titel :
CompEuro '89., 'VLSI and Computer Peripherals. VLSI and Microelectronic Applications in Intelligent Peripherals and their Interconnection Networks', Proceedings.
Conference_Location :
Hamburg
Print_ISBN :
0-8186-1940-6
DOI :
10.1109/CMPEUR.1989.93459