• DocumentCode
    3255817
  • Title

    Multiply-add fused float point unit with on-fly denormalized number processing

  • Author

    He, Hu ; Li, Zheng ; Sun, Yihe

  • Author_Institution
    Inst. of Microelectron., Tsinghua Univ., Beijing
  • fYear
    2005
  • fDate
    7-10 Aug. 2005
  • Firstpage
    1466
  • Abstract
    Denormalized numbers are the most difficult type of numbers to implement in float-point units. They are so complex that many designs avoid handling them in hardware. The denormalized number processing cost two much extra clock cycle in software implementation. In this paper, an on-fly floating point denormalized number processing implemented in a multiply-add-fused (MAF) with little extra latency is presented. The denormalized number processing is embedded in a popular MAF data path and fused with the MAF smoothly by representing the denormalized number. The extra latency introduced by the denormalized number processing is cost by the denormalized number detection
  • Keywords
    clocks; floating point arithmetic; MAF data path; clock cycle; denormalized number processing; multiply-add fused float point unit; Clocks; Costs; Delay; Fuses; Hardware; Helium; Microelectronics; Sun;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2005. 48th Midwest Symposium on
  • Conference_Location
    Covington, KY
  • Print_ISBN
    0-7803-9197-7
  • Type

    conf

  • DOI
    10.1109/MWSCAS.2005.1594389
  • Filename
    1594389