CMOS discrete-time chaotic circuit for low-power embedded cryptosystems

Author

Gregori, Stefano ; Cabrini, Alessandro

Author_Institution

Sch. of Eng., Guelph Univ., Ont.

fYear

2005

fDate

7-10 Aug. 2005

Firstpage

1498

Abstract

We designed a discrete-time chaotic signal generator for low-power embedded cryptosystems. In these systems, an unpredictable source of random numbers is the key element to ensure security. In this paper we show how to design and use an integrated chaotic circuit for random number generation. The proposed circuit consists of a non linear function block, a S/H circuit, and a comparator. It is designed in 0.18-mum CMOS process and operates with nominal 3 V supply with a power dissipation of less than 100 muW at a 100 kHz frequency

Keywords

CMOS integrated circuits; chaos; comparators (circuits); cryptography; embedded systems; integrated circuit design; low-power electronics; random number generation; sample and hold circuits; signal generators; 0.18 micron; 100 kHz; 3 V; CMOS process; S/H circuit; chaotic signal generator; comparator; discrete-time chaotic circuit; embedded cryptosystems; integrated chaotic circuit; nonlinear function block; random number generation; CMOS process; Chaos; Circuits; Cryptography; Power dissipation; Power supplies; Random number generation; Security; Signal design; Signal generators;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2005. 48th Midwest Symposium on

Conference_Location

Covington, KY

Print_ISBN

0-7803-9197-7

Type

conf

DOI

10.1109/MWSCAS.2005.1594397

Filename

1594397