DocumentCode
3256282
Title
IP integration methodology for SoC design
Author
Abbes, F. ; Casseau, E. ; Abid, M. ; Coussy, P. ; Legoff, J.B.
Author_Institution
Ecole Nat. d´´Ingenieurs de Sfax, Tunisia
fYear
2004
fDate
6-8 Dec. 2004
Firstpage
343
Lastpage
346
Abstract
Integrating intellectual property (IP) components into system-on-chip (SoC) designs requires the use of a generic parameterizable hardware/software interface to increase reuse efficiently, quality and productivity of SoC design. In this paper, we propose a design approach for wrapping the cycle accurate bit accurate (CABA) interface of hardware IPs. This interface integrates many communication and synchronization mechanisms with respect to the virtual component interface (VCI) protocol from VSIA to fulfill IP designer and IP integrator requirements.
Keywords
circuit complexity; industrial property; integrated circuit design; protocols; software reusability; system-on-chip; SoC design; communication mechanism; cycle accurate bit accurate interface; hardware-software interface; intellectual property components; synchronization mechanism; system on chip design; virtual component interface protocol; Application software; Design methodology; Hardware; Intellectual property; Productivity; Protocols; System-on-a-chip; Taxonomy; Virtual colonoscopy; Wrapping;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronics, 2004. ICM 2004 Proceedings. The 16th International Conference on
Print_ISBN
0-7803-8656-6
Type
conf
DOI
10.1109/ICM.2004.1434582
Filename
1434582
Link To Document