Title :
A new 800 V lateral MOSFET with dual conduction paths
Author :
Disney, D.R. ; Paul, A.K. ; Darwish, M. ; Basecki, R. ; Rumennik, V.
Author_Institution :
Power Integrations Inc., San Jose, CA, USA
Abstract :
A novel 800 V lateral MOSFET is presented. The key feature of this new device is a buried P-type layer that divides the N-type drift region into two parallel conduction paths. The dual conduction paths provide an on-state resistance reduction of 33% as compared with a state-of-the-art double RESURF MOSFET. Charge balance is maintained among the layers to ensure high blocking voltage capability. The manufacturing process is relatively simple and provides excellent control of the charge in each layer by using ion implantation steps rather than epitaxial layers. A new BiCMOS Power IC process, featuring this novel device, is used to manufacture cost-effective integrated power supply chips
Keywords :
BiCMOS integrated circuits; ion implantation; power MOSFET; power integrated circuits; 800 V; BiCMOS Power IC; N-type drift region; blocking voltage; buried P-type layer; charge balance; dual conduction paths; ion implantation; lateral MOSFET; manufacturing process; on-state resistance; power supply chip; BiCMOS integrated circuits; Doping; Electric resistance; Epitaxial layers; Ion implantation; MOSFET circuits; Manufacturing processes; Poisson equations; Power MOSFET; Voltage;
Conference_Titel :
Power Semiconductor Devices and ICs, 2001. ISPSD '01. Proceedings of the 13th International Symposium on
Conference_Location :
Osaka
Print_ISBN :
4-88686-056-7
DOI :
10.1109/ISPSD.2001.934638
