A rate adaption gateway to the ISDN

Author

Busschaert, Hans J. ; Reusens, Peter P. ; Rabaey, Dirk H.

Author_Institution

Alcatel Bell Telephone, Antwerp, Belgium

fYear

1989

fDate

8-12 May 1989

Abstract

A multistandard rate adapter coprocessor chip, designed for use in integrated services digital network (ISDN) terminal adapters and U-interface modems, is presented. It provides a compact low-power protocol convertor to connect asynchronous (up to 19200 b/s) and synchronous (up to 64 kbit/s) data terminal equipment with any digital 64-kbit/s network. The chip was developed in a 2-μm CMOS technology using a hierarchical design methodology. The chip provides a compact cost- and power-efficient solution for universal-terminal adapter design. The rate adapter is the cornerstone of a 144-kbit/s U-interface modem and a major breakthrough for the next-generation multistandard terminal adapter

Keywords

CMOS integrated circuits; ISDN; computer interfaces; modems; 144 Kbit/s; 2 micron; CMOS technology; ISDN; U-interface modems; hierarchical design methodology; integrated services digital network; multistandard rate adapter coprocessor chip; protocol convertor; rate adaption gateway; Circuits; Communication standards; Coprocessors; Digital signal processors; ISDN; Microcontrollers; Microprocessors; Modems; Protocols; Telephony;

fLanguage

English

Publisher

ieee

Conference_Titel

CompEuro '89., 'VLSI and Computer Peripherals. VLSI and Microelectronic Applications in Intelligent Peripherals and their Interconnection Networks', Proceedings.

Conference_Location

Hamburg

Print_ISBN

0-8186-1940-6

Type

conf

DOI

10.1109/CMPEUR.1989.93468

Filename

93468