Design of a reconfigurable switch architecture for next generation communication networks

Reconfigurability refers to systems incorporating some form of hardware programmability, that customizes how the hardware is used using a number of physical control points. These control points can be changed periodically in order to execute different applications using the same hardware. This paper presents the design and implementation of reconfigurable switch architecture for next generation networks (NGN´s) where the configurations are changed by changing the control signal at the output. Here four different architectures are merged to form a single architecture and the VLSI performance in terms of area, power and delay are analyzed. The simulations are performed using HDL (Verilog) and performance is analyzed in Synopsys - design compiler.