• DocumentCode
    3258565
  • Title

    An engineering environment for hardware/software co-simulation

  • Author

    Becker, David ; Singh, Raj K. ; Tell, Stephen G.

  • Author_Institution
    Dept. of Comput. Sci., North Carolina Univ., Chapel Hill, NC, USA
  • fYear
    1992
  • fDate
    8-12 Jun 1992
  • Firstpage
    129
  • Lastpage
    134
  • Abstract
    The authors describe an environment supporting concurrent hardware and software engineering for high performance systems. In place of a conventional bread-boarded prototype, they used distributed communicating processes to allow software and simulated hardware to interact. The Cadence Verilog-XL simulator was extended to enable software debugging and testing using hardware simulation. The environment was proven during a successful system design
  • Keywords
    concurrent engineering; program debugging; program testing; protocols; Cadence Verilog-XL simulator; concurrent engineering; distributed communicating processes; engineering environment; hardware/software cosimulation; software debugging; Backplanes; Circuit simulation; Computational modeling; Debugging; Hardware design languages; Microprogramming; Printed circuits; Prototypes; Software prototyping; Software systems;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 1992. Proceedings., 29th ACM/IEEE
  • Conference_Location
    Anaheim, CA
  • ISSN
    0738-100X
  • Print_ISBN
    0-8186-2822-7
  • Type

    conf

  • DOI
    10.1109/DAC.1992.227848
  • Filename
    227848