• DocumentCode
    3258571
  • Title

    Phony Stability Problem in Fast LDOs

  • Author

    Stanescu, Cornel

  • Author_Institution
    Catalyst Semicond. Romania S.R.L., Bucharest
  • Volume
    2
  • fYear
    2006
  • fDate
    27-29 Sept. 2006
  • Firstpage
    413
  • Lastpage
    416
  • Abstract
    The paper presents a phenomenon associated with the evaluation of fast LDOs. Initial measurements seemed to indicate a potential low phase-margin, which was entirely different from the PSPICE simulations. In fact, it was a phony stability problem given by the response of an input parasitic RLC circuit to the fast-pulsed current load; response that was transmitted to the output through a lower PSRR at high frequency
  • Keywords
    RLC circuits; SPICE; circuit stability; LDOS; PSPICE simulations; RLC circuit; phony stability problem; Capacitors; Circuit simulation; Circuit stability; DC generators; Feedback circuits; Phase measurement; Pulse circuits; Pulse generation; RLC circuits; SPICE;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    International Semiconductor Conference, 2006
  • Conference_Location
    Sinaia
  • Print_ISBN
    1-4244-0109-7
  • Type

    conf

  • DOI
    10.1109/SMICND.2006.284033
  • Filename
    4063261
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3258571