DocumentCode
3258928
Title
FREEZE: a new approach for testing sequential circuits
Author
Abramovici, Miron ; Rajan, Krishna B. ; Miller, David T.
Author_Institution
AT&T Bell Lab., Naperville, IL, USA
fYear
1992
fDate
8-12 Jun 1992
Firstpage
22
Lastpage
25
Abstract
The authors present a new approach for testing sequential circuits which extends the classical concept of a test sequence. The classical approach applies only one vector in every state. In contrast, the new approach temporarily disables the sequential behavior of the circuit by holding the clock inactive and applies a group of vectors in every state. In this way many faults can be combinationally detected. A test generation algorithm called FIRST (fault-independent rapid sequential test generator) was developed based on the new approach. FIRST detected a large percentage of the faults that were detected by a conventional fault-oriented sequential test generator in less CPU time and with shorter sequences
Keywords
logic testing; sequential circuits; FIRST; FREEZE; fault-independent rapid sequential test generator; fault-oriented sequential test generator; sequential behavior; test generation algorithm; testing sequential circuits; Central Processing Unit; Circuit faults; Circuit testing; Clocks; Electrical fault detection; Fault detection; Flip-flops; Semiconductor device testing; Sequential analysis; Sequential circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1992. Proceedings., 29th ACM/IEEE
Conference_Location
Anaheim, CA
ISSN
0738-100X
Print_ISBN
0-8186-2822-7
Type
conf
DOI
10.1109/DAC.1992.227869
Filename
227869
Link To Document