DocumentCode
3258957
Title
Incremental circuit simulation using waveform relaxation
Author
Ju, Yun-Cheng ; Saleh, Resve A.
Author_Institution
Illinois Univ., Urbana, IL, USA
fYear
1992
fDate
8-12 Jun 1992
Firstpage
8
Lastpage
11
Abstract
Two algorithms were developed using waveform relaxation for the rapid re-simulation of circuits that have been modified slightly compared to a previous simulation run. Both local and global changes can be handled so long as the changes are relatively small. In this approach, the window sizes, step sizes, and final waveforms from a previous simulation were used to drive the incremental simulation. In addition, a selective storage scheme was used to reduce the overhead associated with saving the waveforms from a previous run. Experimental results indicated that the run-time using the incremental approach can be reduced by an order of magnitude compared to a complete re-simulation
Keywords
circuit analysis computing; final waveforms; incremental circuit simulation; selective storage scheme; step sizes; waveform relaxation; window sizes; Algorithm design and analysis; Central Processing Unit; Change detection algorithms; Circuit simulation; Digital circuits; Logic circuits; Logic design; Propagation delay; Runtime; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1992. Proceedings., 29th ACM/IEEE
Conference_Location
Anaheim, CA
ISSN
0738-100X
Print_ISBN
0-8186-2822-7
Type
conf
DOI
10.1109/DAC.1992.227872
Filename
227872
Link To Document