Title :
Power-on contention: a reliability issue for logic devices
Author :
Muniandy, Ravisangar ; Miller, Stanford ; Tee, Lim Yew ; Boylan, Ron
Author_Institution :
Intel Technol., Penang, Malaysia
fDate :
27 Nov-1 Dec 1995
Abstract :
Power-on contention has emerged as a new reliability concern for logic devices. A description of what power-on contention is, the reliability risk it poses (especially with shrinking device geometry) and the need to design away from this phenomenon, is given. A case study of real failure due to power-on contention will make up a large part of this presentation
Keywords :
logic devices; reliability; design; failure; logic devices; power-on contention; reliability; BiCMOS integrated circuits; Clocks; Driver circuits; Isolation technology; Joining processes; Logic devices; Multiplexing; Printed circuits; Stress; Transistors;
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits, 1995., Proceedings of the 1995 5th International Symposium on the
Print_ISBN :
0-7803-2797-7
DOI :
10.1109/IPFA.1995.487589
