Title :
Active Idd consumption test in 4Meg DRAM failure analysis
Author :
Chan, Alvin ; Wai, David Lam Tai ; Tan, Wei ; Durai, Elankovan
Author_Institution :
Texas Instrum. Pte Ltd., Singapore
fDate :
27 Nov-1 Dec 1995
Abstract :
Active current consumption testing measures the current of the device while in active operation. During device operation, the device transistors switch from one state to another as the input signal propagates through the device. Eventually, the signal would have completed triggering the transistors and reach steady state condition. In this paper, the analysis was done on 4meg dram using 0.6 micron CMOS technology. Idd consumption testing has been more successful in CMOS devices due to its complementary arrangement of transistors. At steady state, one of the transistors will be “shorted” to either Vdd or Vss, while the other complementary transistor is “open”. Any defect that exists resulting in a bridging or open fault at the transistors would give an abnormal steady state current. In bridging fault, the current increase can be milliamps from the nanoamps of steady state current. Open faults normally leads to a stuck-at fault. In the case of open, it is dependant on how the defective transistors affect the next stage of transistors or circuits
Keywords :
CMOS memory circuits; DRAM chips; failure analysis; fault location; integrated circuit testing; 0.6 micron; 4 Mbit; CMOS technology; DRAM; active current consumption testing; bridging fault; failure analysis; open fault; steady state condition; stuck-at fault; CMOS technology; Circuit faults; Current measurement; Failure analysis; Instruments; Random access memory; Steady-state; Switches; Testing; Variable structure systems;
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits, 1995., Proceedings of the 1995 5th International Symposium on the
Print_ISBN :
0-7803-2797-7
DOI :
10.1109/IPFA.1995.487597