DocumentCode
3259896
Title
Efficient static timing analysis using a unified framework for false paths and multi-cycle paths
Author
Zhou, Shuo ; Yao, Bo ; Chen, Hongyu ; Zhu, Yi ; Cheng, Chung-Kuan ; Hutton, Mike
Author_Institution
California Univ., San Diego, CA, USA
fYear
2006
fDate
24-27 Jan. 2006
Abstract
We propose a framework to unify the process of false paths and multi-cycle paths in static timing analysis (STA). We use subgraphs attached with timing constraints to represent false paths and multi-cycle paths. The complexity of the subgraph representation is reduced to improve efficiency. Finally, we present theorems to show that the unified framework produces correct timings. The experimental results demonstrate that the minimization is effective for both artificial and industry test cases.
Keywords
computational complexity; graph theory; network analysis; timing; false paths; multi-cycle paths; static timing analysis; subgraph representation; Circuit optimization; Clocks; Cost function; Minimization; Performance analysis; Runtime; Testing; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 2006. Asia and South Pacific Conference on
Print_ISBN
0-7803-9451-8
Type
conf
DOI
10.1109/ASPDAC.2006.1594648
Filename
1594648
Link To Document