Parallel processors and an approach to the development of inference engine

The reliable and fault tolerant computers are key to the success to aerospace, and communication industries where failures of the system can cause a significant economic impact and loss of life. Designing a reliable digital system, and detecting and repairing the faults are challenging tasks in order for the digital system to operate without failures for a given period of time. The paper presents a new and systematic software engineering approach of performing fault diagnosis of digital systems, which have employed multiple processors. The fault diagnosis model is based on the classic PMC model to generate data obtained on the basis of test results performed by the processors. The PMC model poses a tremendous challenge to the user in doing fault analysis on the basis of test results performed by the processors. This paper will perform one fault model for developing software. The effort has been made to preserve the necessary and sufficient.