• DocumentCode
    3261035
  • Title

    A dynamic test compaction procedure for high-quality path delay testing

  • Author

    Fukunaga, Masayasu ; Kajihara, Seiji ; Wen, Xiaoqing ; Maeda, Toshiyuki ; Hamada, Shuji ; Sato, Yasuo

  • Author_Institution
    Fujitsu Ltd., Kawasaki
  • fYear
    2006
  • fDate
    24-27 Jan. 2006
  • Abstract
    We propose a dynamic test compaction procedure to generate high-quality test patterns for path delay faults. While the proposed procedure generates a compact two-pattern test set for paths selected by a path selection criterion, the generated test set would detect not only faults on the selected paths but also faults on many unselected paths. Hence both high test quality by detecting untargeted faults and test cost reduction by reducing test patterns can be achieved. Experimental results show that the proposed procedure could generate a compact test set that detect many untargeted path delay faults certainly, compared with the static test compaction method previously proposed (Kajihara et al., 2005)
  • Keywords
    automatic test pattern generation; delays; fault diagnosis; logic testing; compact test set; dynamic test compaction; high-quality test patterns; path delay faults; path delay testing; path selection; test cost reduction; Circuit faults; Circuit testing; Compaction; Costs; Delay; Electrical fault detection; Fault detection; Manufacturing; Test pattern generators; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation, 2006. Asia and South Pacific Conference on
  • Conference_Location
    Yokohama
  • Print_ISBN
    0-7803-9451-8
  • Type

    conf

  • DOI
    10.1109/ASPDAC.2006.1594707
  • Filename
    1594707