Design methodology of FSMs with intrinsic fault tolerance and recovery capabilities

When ASICs are dedicated to highly dependable applications, concurrent checking and/or fault-tolerance capabilities are necessary on chip. In particular, FSMs must be protected against permanent and transient faults. The authors review the main proposals one can fine on this subject in the literature. Then, an approach is proposed to achieve intrinsic fault tolerance. This approach is based on a specific logic synthesis for FSMs described by their state transition graph