Title :
An efficient class of SEC-DED-AUED codes
Author :
Bhattacharryya, D.K. ; Nandi, S.
Author_Institution :
Dept. of Comput. Sci., Tezpur Univ., Assam, India
Abstract :
In this paper, an efficient method for constructing a class of Single Error Correcting and Double Error Detecting and All Unidirectional Error Detecting (SEC-DED-AUED) codes has been presented. The encoding/decoding algorithms proposed with this method can be implemented with a simple and faster hardware. Also, in ROM based implementation, it results in significant saving of word-length. This scheme in general, needs less or equal number of check bits
Keywords :
error correction codes; error detection codes; information theory; SEC-DED-AUED codes; codes; decoding; encoding; error correcting codes; error detecting codes; Circuit faults; Computer errors; Decoding; Error correction; Error correction codes; Hamming distance; Hardware; Power supplies; Read only memory; Very large scale integration;
Conference_Titel :
Parallel Architectures, Algorithms, and Networks, 1997. (I-SPAN '97) Proceedings., Third International Symposium on
Conference_Location :
Taipei
Print_ISBN :
0-8186-8259-6
DOI :
10.1109/ISPAN.1997.645128
