• DocumentCode
    3261461
  • Title

    The cache architecture of the Apollo DN4000

  • Author

    Frink, Craig R. ; Roy, Paul J.

  • Author_Institution
    Apollo Comput. Inc., Chelmsford, MA, USA
  • fYear
    1988
  • fDate
    Feb. 29 1988-March 3 1988
  • Firstpage
    300
  • Lastpage
    302
  • Abstract
    The authors examine the cache architecture of the Apollo DN4000 workstation, which utilizes a virtual cache to provide a cost-effective approach to high-performance computing. Of particular interest is how the use of a virtually tagged, write-through cache made it possible to use a low-cost, off-the-shelf MMU (memory-management unit) and resulted in inclusion of a virtual write buffer. This architecture enables the processor to execute zero wait-state memory reads and writes. It is shown how the way that objects are accessed in Apollo´s system led to a write-allocate cache update policy to solve the virtual address synonym problem.<>
  • Keywords
    buffer storage; computer architecture; virtual storage; workstations; Apollo DN4000 workstation; cache architecture; memory-management unit; off-the-shelf MMU; virtual address synonym problem; virtual cache; virtual write buffer; virtually tagged; write-allocate cache update policy; write-through cache; zero wait-state memory reads and writes; Cache memory; Computer architecture; Coprocessors; Memory architecture; Memory management; Microprocessors; Read-write memory; Trademarks; Workstations;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Compcon Spring '88. Thirty-Third IEEE Computer Society International Conference, Digest of Papers
  • Conference_Location
    San Francisco, CA, USA
  • Print_ISBN
    0-8186-0828-5
  • Type

    conf

  • DOI
    10.1109/CMPCON.1988.4878
  • Filename
    4878