DocumentCode :
3261901
Title :
CDCTree: novel obstacle-avoiding routing tree construction based on current driven circuit model
Author :
Shi, Yiyu ; Jing, Tong ; He, Lei ; Feng, Zhe ; Hong, Xianlong
Author_Institution :
Dept. of Electr. Eng., UCLA, Los Angeles, CA
fYear :
2006
fDate :
24-27 Jan. 2006
Abstract :
Routing tree construction is a fundamental problem in modern VLSI design. In this paper we propose CDCTree, an Obstacle-Avoiding Rectilinear Steiner Minimum Tree (OARSMT) heuristic algorithm to construct an OARSMT. CDCTree is based on the current driven circuit (CDC) model mapped from an escape graph. The circuit structure comes from the topology of the escape graph, with each edge replaced by a resistor indicating the wirelength of that edge. By performing DC analysis on the circuit and selecting the edges according to the current distribution to construct an OARSMT, the wirelength of the resulting tree is short. The algorithm has been implemented and tested on cases of different scales and with different shapes of obstacles. Experiments show that CDCTree can achieve shorter wirelength than the existing best algorithm, An-OARSMan, when the terminal number of a net is less than 50
Keywords :
current distribution; network routing; network topology; trees (electrical); CDCTree; DC analysis; circuit structure; current distribution; current driven circuit; escape graph; heuristic algorithm; obstacle-avoiding rectilinear steiner minimum tree; routing tree construction; Circuit analysis; Circuit topology; Current distribution; Heuristic algorithms; Performance analysis; Resistors; Routing; Steiner trees; Tree graphs; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 2006. Asia and South Pacific Conference on
Conference_Location :
Yokohama
Print_ISBN :
0-7803-9451-8
Type :
conf
DOI :
10.1109/ASPDAC.2006.1594756
Filename :
1594756
Link To Document :
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