• DocumentCode
    3262825
  • Title

    Realization of high performance dual gate DRAMs without boron penetration by application of tetrachlorosilane silicon nitride films

  • Author

    Tanaka, M. ; Saida, S. ; Inoue, F. ; Kojima, M. ; Nakanishi, T. ; Suguro, K. ; Tsunashima, Y.

  • Author_Institution
    Toshiba Corp., Yokohama, Japan
  • fYear
    2001
  • fDate
    12-14 June 2001
  • Firstpage
    123
  • Lastpage
    124
  • Abstract
    It is well known that conventional SiN films accelerate boron penetration due to hydrogen desorption during a high temperature annealing process after SiN deposition (Pfiester et al, 1990). The boron penetration causes depletion of the gate electrodes and threshold voltage deviations, and degrades the PMOSFETs. In the case of next generation DRAMs, thick SiN films are necessary as a hard mask for a self-aligned contact (SAC) process to increase the density. Simultaneously, dual gate CMOS systems should be applied to realize high performance. Therefore, SiN films without boron penetration must be developed for realization of dual gate CMOS systems with a SAC process. Conventional silicon nitride (SiN) films accelerate boron penetration, which causes the degradation of PMOSFETs. It was found that boron penetration becomes worse in proportion to SiH content incorporated in SiN LPCVD films. Applications of SiH-less SiN films, formed from tetrachlorosilane (TCS) and ammonia, have successfully realized the high performance of PMOSFETs in dual gate system DRAMs.
  • Keywords
    CMOS memory circuits; DRAM chips; MOSFET; annealing; chemical vapour deposition; electrical contacts; integrated circuit interconnections; integrated circuit metallisation; masks; silicon compounds; B; NH/sub 3/; PMOSFET degradation; PMOSFETs; SAC process; SiH; SiH content; SiH-less SiN films; SiN; SiN LPCVD films; SiN deposition; SiN film hard mask; SiN films; ammonia; annealing process; boron penetration; dual gate CMOS systems; dual gate DRAMs; dual gate system DRAMs; gate electrode depletion; self-aligned contact process; silicon nitride films; tetrachlorosilane; tetrachlorosilane silicon nitride films; threshold voltage deviation; Acceleration; Annealing; Boron; Degradation; Electrodes; Hydrogen; MOSFETs; Silicon compounds; Temperature; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, 2001. Digest of Technical Papers. 2001 Symposium on
  • Conference_Location
    Kyoto, Japan
  • Print_ISBN
    4-89114-012-7
  • Type

    conf

  • DOI
    10.1109/VLSIT.2001.934980
  • Filename
    934980