Title :
Procedures for minimization of "Exclusive-or" and "Logical-equivalence" switching circuits
Abstract :
The transformation which carries an arbitrary switching function represented by its disjunctive (or conjunctive) canonical form to its EXCLUSIVE-OR (Δ) (or the LOGICAL EQUIVALENCE (∇)) requiresmanipulation of vectors and square matrices of dimension 2n where n is the number of input variables. In this paper we develop a simple iterative procedure which gives the minimal Δ (or ∇) canonical switching circuit configuration using only uncomplemented (or complemented inputs. Our next algorithm assigns best polarities (true or complemented) to every input variable such that on application of the first algorithm we get a configuration with a minimum number of Δ(or ∇) circuits. The latter algorithm appears to be a significant synthesis procedure. These techniques provide valuable tools for day to day synthesis of these circuits because of their inherent simplicity and iterarive nature, in contrast to the methods already proposed. These synthesis procedures are extended to the cases when the truth table contains some "Don\´t Care" states and multiple outputs. Consideration is also given to decomposition and factorization. Also simple transformational rules are given that take the switching functions from Δ to ∇ form and from these to the disjunctive (or conjunctive) canonical forms.
Keywords :
Minimization; Switching circuits;
Conference_Titel :
Switching Circuit Theory and Logical Design, 1965. SWCT 1965. Sixth Annual Symposium on
Conference_Location :
Ann Arbor, MI, USA
DOI :
10.1109/FOCS.1965.23