DocumentCode
3264016
Title
A single-chip MPEG2 MP@HL decoder for DTV recording/playback system
Author
Watanabe, Y. ; Otobe, Y. ; Yoshitomi, K. ; Takahashi, H. ; Kohiyama, K.
Author_Institution
Fujitsu Labs. Ltd., Kawasaki, Japan
fYear
2001
fDate
2001
Firstpage
90
Lastpage
91
Abstract
This paper presents an MPEG2 MP@HL decoder LSI for use in recording and playback systems. It integrates digital broadcast recording and playback functions on a single chip, and enables smooth execution of trick plays with less computational requirements in an external CPU
Keywords
CMOS digital integrated circuits; decoding; digital signal processing chips; digital video broadcasting; large scale integration; video recording; video signal processing; DTV recording/playback system; MPEG2 MP@HL decoder LSI; computational requirements; digital TV; digital broadcast playback; digital broadcast recording; single-chip MPEG2 MP@HL decoder; trick plays; Data mining; Decoding; Digital TV; Displays; Graphics; Large scale integration; Motion estimation; Power generation; Streaming media; Video recording;
fLanguage
English
Publisher
ieee
Conference_Titel
Consumer Electronics, 2001. ICCE. International Conference on
Conference_Location
Los Angeles, CA
Print_ISBN
0-7803-6622-0
Type
conf
DOI
10.1109/ICCE.2001.935224
Filename
935224
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