DocumentCode :
3264211
Title :
Impact of Process Variation Induced Transistor Mismatch on Sense Amplifier Performance
Author :
Rodrigues, Steevan ; Bhat, M.S.
Author_Institution :
NITK Suratkal, Suratkal
fYear :
2006
fDate :
20-23 Dec. 2006
Firstpage :
497
Lastpage :
502
Abstract :
Sense amplifier is a very critical peripheral circuit in memories as its performance strongly affects both memory access time, and overall memory power dissipation. As the device dimensions scale below 100nm, the process variations are increasing and are impacting the circuit design significantly. The circuit yield loss caused by the process and device parameter variation has been more pronounced than before [1]. In this paper, effects of process variation induced transistor mismatch on sense amplifier performance are studied. A comparative study of the effect of mismatch on delay and yield for different sense amplifier configurations at 90 nm technology is presented.
Keywords :
network synthesis; transistors; circuit design; memory access time; memory power dissipation; peripheral circuit; process variation induced transistor mismatch; sense amplifier performance; CMOS technology; Circuits; Delay; Differential amplifiers; Fabrication; Fluctuations; MOSFETs; Power amplifiers; Threshold voltage; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Advanced Computing and Communications, 2006. ADCOM 2006. International Conference on
Conference_Location :
Surathkal
Print_ISBN :
1-4244-0716-8
Electronic_ISBN :
1-4244-0716-8
Type :
conf
DOI :
10.1109/ADCOM.2006.4289943
Filename :
4289943
Link To Document :
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