Title :
A digital CMOS imager with pixel level analog-to-digital converter and reconfigurable SRAM/counter
Author :
Yung, Yat-Fong ; Bermak, Amine
Author_Institution :
Dept. of EEE, Hong Kong Univ. of Sci. & Technol., China
Abstract :
In this paper a CMOS image sensor with on-pixel analog-to-digital converter based on PWM scheme is proposed. The digital pixel sensor includes a novel digital circuit which allows to configure the internal 8-bit memory as a 4-bit counter/memory, so as to reduce the data bit lines routed to each pixel form 8-bit to 4-bit. Hence the total parasitic capacitance as well as power consumption associated with the switching activities of the global data bus lines are reduced. Besides 8-bit precision, the imager can also be configured to 4-bit precision for low resolution frame rate and decreasing overall power consumption. A prototype chip was realized in Alcatel 0.35μm CMOS technology. Each pixel occupies an area of 46μm x 48μm with a fill-factor of 14%.
Keywords :
CMOS image sensors; analogue-digital conversion; capacitance; power consumption; pulse width modulation; CMOS image sensor; digital CMOS imager; digital circuit; digital pixel sensor; on-pixel analog-to-digital converter; parasitic capacitance; pixel level analog-to-digital converter; power consumption; pulse width modulation; reconfigurable SRAM; reconfigurable counter; Analog-digital conversion; CMOS image sensors; CMOS technology; Counting circuits; Digital circuits; Energy consumption; Pixel; Pulse width modulation; Pulse width modulation converters; Random access memory;
Conference_Titel :
System-on-Chip for Real-Time Applications, 2004.Proceedings. 4th IEEE International Workshop on
Print_ISBN :
0-7695-2182-7
DOI :
10.1109/IWSOC.2004.1319845
