DocumentCode
3265476
Title
An intellectual property module for auto-calibration of time-interleaved pipelined analog-to-digital converters
Author
Morin, D. ; Normandin, F. ; Grandmaison, M.E. ; Dang, H. ; Savaria, Y. ; Sawan, M.
Author_Institution
Ecole Polytechnique de Montreal, Que., Canada
fYear
2004
fDate
19-21 July 2004
Firstpage
111
Lastpage
114
Abstract
A flexible digital intellectual property (IP) module that controls the auto-calibration of time interleaved pipelined ADCs is presented. It takes advantage of a judicious combination of classical calibration techniques to determine, in an adaptive way, the adequate compensation of gain and offset for each stage of interleaved pipelined ADCs. A novel built-in self-test (BIST) is also included in the IP. Preliminary simulation results confirm the expected behavior of the calibration method. This soft IP was designed and synthesized.
Keywords
analogue-digital conversion; calibration; industrial property; pipeline arithmetic; analog-to-digital converters autocalibration; built-in self-test; digital intellectual property; intellectual property module; time-interleaved pipelined converters; Analog-digital conversion; Built-in self-test; Calibration; Circuit testing; Data communication; Frequency conversion; Intellectual property; Linearity; Pipeline processing; Redundancy;
fLanguage
English
Publisher
ieee
Conference_Titel
System-on-Chip for Real-Time Applications, 2004.Proceedings. 4th IEEE International Workshop on
Print_ISBN
0-7695-2182-7
Type
conf
DOI
10.1109/IWSOC.2004.1319860
Filename
1319860
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