Leakage dissipation reduction of single-phase power-gating adiabatic sequential circuits using MTCMOS

Reducing leakage dissipation is becoming more and more important in low-power design. The dynamic energy dissipation reduction of adiabatic circuits using power-gating schemes has been introduced. In order to reduce leakage losses of the adiabatic circuits using power-gating schemes under deep submicron process, this paper proposes a MTCMOS (Multi-Threshold CMOS) power-gating scheme for adiabatic sequential circuits based on two-phase CPAL (complementary pass-transistor adiabatic logic) circuits, which can operate in a single-phase power clock by introducing a two-phase power-clock generator. A practical sequential system with a mode-10 counter is demonstrated using the MTCMOS power-gating scheme. All circuits are verified using HSPICE, and BSIM4 model is adopted to reflect the characteristics of the leakage currents. Simulations show that the leakage losses are greatly reduced.