SOC design of an IF subsampling terminal for a gigabit wireless LAN with asymmetric equalization

Author

Pekau, Holly ; Nakaska, Joshua K. ; Kulyk, Jim ; McGibney, Grant ; Haslett, James W.

Author_Institution

Dept. of Electr. & Comput. Eng., Calgary Univ., Alta., Canada

fYear

2004

fDate

19-21 July 2004

Firstpage

307

Lastpage

313

Abstract

The design of a simple IF subsampling terminal for a gigabit wireless local area network is presented. All equalization is performed in the base station, allowing the terminal to be implemented using simplified hardware without any digital signal processing. System design of the WLAN terminal is discussed and simulation results are presented for an SOC implementation of the terminal receiver with realistic block specifications. The WLAN uses 16-QAM modulation with a data rate of 1.6Gbit/s, and has a 400MHz signal bandwidth modulated on a 10.4GHz carrier, down-converted to an intermediate frequency of 800MHz.

Keywords

integrated circuit design; signal sampling; system-on-chip; wireless LAN; 1.04E10 Hz; 1.7E09 bit/s; 4E08 Hz; 8E08 Hz; IF subsampling terminal; QAM modulation; SOC design; asymmetric equalization; digital signal processing; gigabit wireless LAN; wireless local area network; Band pass filters; Base stations; Delay; Digital signal processing; Finite impulse response filter; Frequency diversity; Hardware; Indoor environments; Signal processing; Wireless LAN;

fLanguage

English

Publisher

ieee

Conference_Titel

System-on-Chip for Real-Time Applications, 2004.Proceedings. 4th IEEE International Workshop on

Print_ISBN

0-7695-2182-7

Type

conf

DOI

10.1109/IWSOC.2004.1319899

Filename

1319899