A retargetable embedded code scheduler for SoC design space exploration under real-time constraints

Since SoC design space exploration has to consider alternative target CPUs, retargetable tools are required. To comply with the promising TLM paradigm, designs usually start with untimed models and timing annotation is performed later. As a result, time-constraints are imposed to pre-compiled code. This paper describes a time-constraint-driven technique that harmonizes the pre-compiled code to the annotated constraints by performing automatically-retargetable assembly code scheduling, thereby avoiding full recompilation.