Implementation of H.264 algorithm on reconfigurable processor ReMAP

Author

Dai, Peng ; Wang, Xinan ; Zhang, Xing

Author_Institution

Key Lab. of Integrated Microsyst. Sci. & Eng. Applic., Peking Univ., Shenzhen, China

fYear

2009

fDate

19-21 Jan. 2009

Firstpage

237

Lastpage

240

Abstract

Nowadays, H.264 is drawing more attention than other video coding standard because of greater compression ratio and higher video quality. This paper shows the implementation of H.264 on a Reconfigurable Multimedia Array Processor (ReMAP). Algorithm is realized by configuring the ALUs´ operation and the communication relationship of the ALU array. ReMAP receives the dataflow, executes the operation with pipelined ALU elements as stream processor. Research shows that ReMAP can support realization of H.264 with comparable performance and achieve more flexibility.

Keywords

data compression; microprocessor chips; reconfigurable architectures; video coding; ALU array; H.264 algorithm; compression ratio; pipelined ALU elements; reconfigurable multimedia array processor; reconfigurable processor ReMAP; stream processor; video coding standard; video quality; Application specific integrated circuits; Concurrent computing; Cost function; Field programmable gate arrays; Hardware; Motion estimation; Streaming media; Time to market; Video coding; Video compression;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronics & Electronics, 2009. PrimeAsia 2009. Asia Pacific Conference on Postgraduate Research in

Conference_Location

Shanghai

Print_ISBN

978-1-4244-4668-1

Electronic_ISBN

978-1-4244-4669-8

Type

conf

DOI

10.1109/PRIMEASIA.2009.5397404

Filename

5397404