DocumentCode :
3266999
Title :
Soft-error testing of COTS DRAM components
Author :
Hwang, Seung H. ; Choi, Gwan
Author_Institution :
Lucent Technol., Allentown, PA, USA
fYear :
1999
fDate :
1999
Firstpage :
821
Lastpage :
827
Abstract :
The paper presents a memory-testing framework wherein an application-driven at rated speed reliability testing is possible for a wide variety of COTS memory components. The susceptibility trend of recent DRAM generations and their impacts at system level are quantified within the proposed testing framework
Keywords :
DRAM chips; circuit simulation; computer equipment testing; integrated circuit reliability; integrated circuit testing; radiation hardening (electronics); semiconductor device reliability; COTS DRAM components; fault model; memory-testing; mixed mode simulation; radiation; reliability testing; soft-error testing; susceptibility trend; system level; Analytical models; Application software; Circuit faults; Circuit simulation; Circuit testing; Computer errors; Radiation detectors; Random access memory; Single event upset; System testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
AUTOTESTCON '99. IEEE Systems Readiness Technology Conference, 1999. IEEE
Conference_Location :
San Antonio, TX
ISSN :
1080-7725
Print_ISBN :
0-7803-5432-X
Type :
conf
DOI :
10.1109/AUTEST.1999.800458
Filename :
800458
Link To Document :
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