Title :
A single-electron-transistor logic gate family and its application - Part I: basic components for binary, multiple-valued and mixed-mode logic
Author :
Degawa, Katsuhiko ; Aoki, Takafumi ; Higuchi, Tatsuo ; Inokawa, Hiroshi ; Takahashi, Yasuo
Author_Institution :
Graduate Sch. of Inf. Sci., Tohoku Univ., Sendai, Japan
Abstract :
This paper presents a model-based study of an SET (single-electron-transistor) logic gate family for synthesizing binary and MV (multiple-valued) logic circuits. The use of SETs combined with MOS transistors allows a compact realization of basic logic functions that exhibit periodic transfer characteristics. These basic SET logic gates are useful for implementing binary logic circuits, MV logic circuits and binary-MV-mixed logic circuits in a highly flexible manner. As an example, this paper describes the design of various parallel counters for carry-propagation-free arithmetic, where MV signals are effectively used to achieve higher functionality with lower hardware complexity.
Keywords :
MOSFET circuits; counting circuits; digital arithmetic; logic circuits; logic gates; multivalued logic circuits; single electron transistors; MOS transistors; SET logic gates; binary logic circuits; carry-propagation-free arithmetic; logic functions; mixed-mode logic; multiple-valued logic; parallel counters; periodic transfer characteristics; single-electron-transistor logic gate family; CMOS logic circuits; CMOS technology; Circuit synthesis; Integrated circuit technology; Logic circuits; Logic devices; Logic functions; Logic gates; MOSFET circuits; Voltage;
Conference_Titel :
Multiple-Valued Logic, 2004. Proceedings. 34th International Symposium on
Print_ISBN :
0-7695-2130-4
DOI :
10.1109/ISMVL.2004.1319952