DocumentCode
3267579
Title
A study of multiple-valued magnetoresistive RAM (MRAM) using binary MTJ devices
Author
Kimura, Hiromitsu ; Pagiamtzis, Kostas ; Sheikholeslami, Ali ; Hanyu, Takahiro
Author_Institution
Graduate Sch. of Inf. Sci., Tohoku Univ., Sendai, Japan
fYear
2004
fDate
19-22 May 2004
Firstpage
340
Lastpage
345
Abstract
This paper presents four-valued magnetoresistive RAM (MRAM) storage cells using one access transistor and two binary magnetic tunnel junction (MTJ) devices, with the MTJ devices either in series or in parallel. We present a comparative study of the two cells in terms of their area and power benefits over the binary MRAM, all using the same conventional MRAM process.
Keywords
SRAM chips; magnetoresistive devices; multivalued logic circuits; tunnelling magnetoresistance; MRAM storage cells; binary MTJ devices; four-valued magnetoresistive RAM; magnetic tunnel junction devices; multiple-valued MRAM; parallel connected cells; series connected cells; single access transistor; Acceleration; CMOS technology; Conductivity; Educational institutions; Logic devices; Magnetic fields; Magnetic tunneling; Portable computers; Read-write memory; Tunneling magnetoresistance;
fLanguage
English
Publisher
ieee
Conference_Titel
Multiple-Valued Logic, 2004. Proceedings. 34th International Symposium on
ISSN
0195-623X
Print_ISBN
0-7695-2130-4
Type
conf
DOI
10.1109/ISMVL.2004.1319965
Filename
1319965
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