DocumentCode
3267588
Title
Variable V/sub cc/ design techniques for battery operated DRAMs
Author
Seung Moon Yoo ; Ejaz Haq ; Seung-Hoon Lee ; Yun-Ho Choi ; Soo-In Cho ; Nam-Soo Kang ; Dae je Chin
Author_Institution
Samsung Electron. Co., Kyungki-Do, South Korea
fYear
1992
fDate
4-6 June 1992
Firstpage
110
Lastpage
111
Abstract
The authors describe a variable V/sub cc/ design technique to extend battery life. Several special circuits for low V/sub cc/, compensated DC generators and wordline drivers are proposed. These are implemented in a 16 M DRAM using 1 polycide, 3 poly, double-metal, and stacked capacitor based 0.4 mu m CMOS technology. The simulated speed of V/sub cc/ variable design is compared with conventional design at 25 degrees C. The slowdown below 2 V is due to threshold voltage and transistor characteristics.<>
Keywords
CMOS integrated circuits; DRAM chips; driver circuits; voltage regulators; 0.4 micron; 16 Mbit; 25 degC; CMOS technology; battery life; battery operated DRAMs; compensated DC generators; variable voltage design techniques; wordline drivers; Batteries; Capacitors; Character generation; Circuits; Design optimization; Detectors; Frequency; Low voltage; Oscillators; Random access memory;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits, 1992. Digest of Technical Papers., 1992 Symposium on
Conference_Location
Seattle, WA, USA
Print_ISBN
0-7803-0701-1
Type
conf
DOI
10.1109/VLSIC.1992.229267
Filename
229267
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