Basic multiple-valued functions using recharge CMOS logic

In this paper, we present novel recharge logic for multiple-valued (MV) systems by utilizing semi-floating-gate (SFG) transistors. The recharge multiple-valued logic can be used to implement low-power digital transition logic circuits. The improvement in power dissipation is mainly in reduced dynamic power dissipation. In this paper, the basic functions suitable for synthesis of MV logic are presented. The main purpose is to level out the power dissipated by a digital system to obtain more suitable logic for mixed mode design.