Designing a high performance FPGA-using the PREP Benchmarks

The PREP Benchmarks provide a wealth of data pertaining to performance and capacity of high-capacity programmable logic devices. The benchmarks contain many common functions which designers can use to determine whether the critical portion of an application fits in a particular device. This aspect of the PREP Benchmarks can be overlooked by designers “blinded by the hype” of the results. This paper will cut through the hype associated with benchmarks and show designers a practical and useful method of using the benchmark data to design high performance FPGA based applications