Low flicker noise and high linearity passive mixer in 0.18µm CMOS for direct conversion receiver

Author

Pan, Zhaolin ; Jiang, Peichen ; Zhang, Li ; Mao, Cui

Author_Institution

Center for Analog & Radio Freq. Integrated Circuit Lab. (CARFIC), Shanghai Jiaotong Univ., Shanghai, China

fYear

2009

fDate

19-21 Jan. 2009

Firstpage

21

Lastpage

24

Abstract

A low flicker noise and high linearity passive mixer in 0.18 μm CMOS is proposed. The mixer, which consists of gm-stage, AC coupled LO switch-pair and low noise trans-impedance amplifier (TIA), features a low flicker noise corner frequency of 5 kHz. The mixer is designed for direct conversion receivers in China Mobile Multimedia Broadcasting (CMMB) system. Simulation results show that the passive mixer achieves a voltage conversion gain (CG) of 21.2 dB, intercept point (IIP3) of +13 dBm, double sideband (DSB) noise figure (NF) of 18.9 dB @ 5 kHz, white DSB NF of 18.1 dB, and output DC offset of less than 3 mV. The mixer dissipates 7.2 mA (including I path and Q path) from a 1.8 V supply.

Keywords

CMOS analogue integrated circuits; mixers (circuits); mobile radio; operational amplifiers; oscillators; radio receivers; AC coupled local oscillator; CMOS; current 7.2 mA; direct conversion receiver; frequency 5 MHz; gain 21.2 dB; linearity passive mixer; low flicker noise mixer; low noise transimpedance amplifier; mobile multimedia broadcasting; noise figure 18.1 dB; noise figure 18.9 dB; size 0.18 μm; voltage 1.8 V; DCR; flicker noise; linearity; passive mixer;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronics & Electronics, 2009. PrimeAsia 2009. Asia Pacific Conference on Postgraduate Research in

Conference_Location

Shanghai

Print_ISBN

978-1-4244-4668-1

Electronic_ISBN

978-1-4244-4669-8

Type

conf

DOI

10.1109/PRIMEASIA.2009.5397458

Filename

5397458